|  PrimeRail培训 | 
                    
                      |  培养对象 | 
                    
                      | 1.理工科背景,有志于数字集成电路设计工作的学生和转行人员; 2.需要充电,提升技术水平和熟悉设计流程的在职人员;
 3.集成电路设计企业的员工内训。
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                      |  入学要求 | 
                     
                      |         
                          学员学习本课程应具备下列基础知识:◆电路系统的基本概念。
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                      |  班级规模及环境 | 
                     
                      | 为了保证培训效果,增加互动环节,我们坚持小班授课,每期报名人数限3到5人,多余人员安排到下一期进行。 | 
                     
                      |  上课时间和地点 | 
                     
                      | 上课地点:【上海】:同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【深圳分部】:电影大厦(地铁一号线大剧院站)/深圳大学成教院 
                        【北京分部】:北京中山学院/福鑫大楼 【武汉分部】:佳源大厦(高新二路) 【南京分部】:金港大厦(和燕路) 【成都分部】:领馆区1号(中和大道) 最近开课时间(周末班/连续班/晚班): PrimeRail培训开班时间:2025年11月17日..共赢、共创....资深工程师授课....同心致远,匠心服务......--即将开课--
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                      |  学时 | 
                     
                      | ◆课时: 共5天,30学时 
 ◆外地学员:代理安排食宿(需提前预定)
 ☆注重质量
 ☆边讲边练
 ☆合格学员免费推荐工作
 
 ☆合格学员免费颁发相关工程师等资格证书,提升您的职业资质
 
 专注高端培训15年,曙海提供的证书得到本行业的广泛认可,学员的能力
 得到大家的认同,受到用人单位的广泛赞誉。
 
 ★实验设备请点击这儿查看★
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                      |  最新优惠 | 
                     
                      | ◆团体报名优惠措施:两人95折优惠,三人或三人以上9折优惠 。注意:在读学生凭学生证,即使一个人也优惠500元。 | 
                     
                      |  质量保障 | 
                     
                      |         
                          1、培训过程中,如有部分内容理解不透或消化不好,可免费在以后培训班中重听;2、培训结束后免费提供半年的技术支持,充分保证培训后出效果;
 3、培训合格学员可享受免费推荐就业机会。 ☆合格学员免费颁发相关工程师等资格证书,提升您的职业资质。专注高端培训13年,曙海提供的证书得到本行业的广泛认可,学员的能力得到大家的认同,受到用人单位的广泛赞誉。
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                      |  PrimeRail培训 | 
                     
                      | 第一阶段 | 
                    
                      | Objectives At the end of this workshop the student should be able to: 
                          Set up and perform Power/Ground (PG) reliability analysis for checking   Static and Dynamic Voltage Drop and Electromigration (EM) potential violations   
                          Explanation of and/or set up the phases of Dynamic analysis of PrimeRail   that involve the following:
                            
                                Library Characterization   
                                Data preparation   
                                Power Analysis   
                                PG Parasitic (RC) Extraction   
                                Dynamic (Transient) Rail Analysis   
                                Violation Viewing, Reporting and Correction   
                                What-if Analysis ? Package parasitics and Decap insertion   
                                Voltage Drop Derated Timing Analysis   
                                Accurate Hard Macro Modeling   
                                Power Management( power switch) Cell handling Set up PG analysis for hierarchical and top-level   
                          Use the PrimeRail graphical user interface (GUI) for the PG rail analysis,   including what-if analysis  Audience Profile ????? Design, verification or CAD   engineers who perform power/ground interconnect reliability analysis at the   "Block" or "Full-Chip" levels. This covers a wide spectrum of designs of   digital, memory, and analog/mixed signal. Prerequisites?????   
                          Experience in the following areas is recommended to gain the most value from the   workshop content:
 
                          Physical layout   
                          Physical extraction   
                          Power simulation  | 
                    
                      | Static Analysis
                            
                              Introduction to Rail Analysis - requirements, capabilities and database   preparation   
                              Power and Timing Model creation   
                              Power supply, net switching and Transition Time inputs   
                              Power and Rail Analysis   
                              Mapping, reporting, querying and what-if Analysis   
                              Integrated Flows - Hardmacro modeling, Power gating and Voltage derated   timing analysis | 
                    
                      | 第二阶段 | 
                    
                      | Dynamic ( Transient) Analysis 
                          Introduction, database requirements and flows   
                          Library Characterization and LSF   
                          Cell-Level Dynamic Analysis-PP Run   
                          Cell-Level Dynamic Analysis-Transient Analysis   
                          What-if Analysis ? Package Parasitics and Decap Insertion   
                          Mapping, waveform viewing, reporting and querying   
                          Tx-Level Dynamic Analysis-Data Preparation   
                          Tx-Level Dynamic Analysis   
                          Tx-Level Signal EM Analysis   
                          Macro Modeling - Memory, Analog, custom or Hardmacro blocks  |