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                      |  Wireless IC Design with SoC and Low Power Techniques (应用SOC及低功耗技术的无线IC设计)
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                      |  入学要求 |   
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                          学员学习本课程应具备下列基础知识:◆ 电路系统的基本概念。
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                      |  班级规模及环境 |   
                      | 为了保证培训效果,增加互动环节,我们坚持小班授课,每期报名人数限3到5人,多余人员安排到下一期进行。 |   
                      |  上课时间和地点 |   
                      | 上课地点:【上海】:同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【深圳分部】:电影大厦(地铁一号线大剧院站)/深圳大学成教院 
                        【北京分部】:北京中山学院/福鑫大楼 【武汉分部】:佳源大厦(高新二路) 【南京分部】:金港大厦(和燕路) 【成都分部】:领馆区1号(中和大道) 最近开课时间(周末班/连续班/晚班): 无线IC设计培训班:2025年11月17日..共赢、共创....资深工程师授课....同心致远,匠心服务......--即将开课--
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                      |  学时 |   
                      | ◆课时: 共5天,30学时 
 ◆外地学员:代理安排食宿(需提前预定)
 ☆注重质量
 ☆边讲边练
 ☆合格学员免费推荐工作
 
 ☆合格学员免费颁发相关工程师等资格证书,提升您的职业资质
 
 专注高端培训15年,曙海提供的证书得到本行业的广泛认可,学员的能力
 得到大家的认同,受到用人单位的广泛赞誉。
 
 ★实验设备请点击这儿查看★
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                      |  最新优惠 |   
                      | ◆团体报名优惠措施:两人95折优惠,三人或三人以上9折优惠 。注意:在读学生凭学生证,即使一个人也优惠500元。 |   
                      |  质量保障 |   
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                          1、培训过程中,如有部分内容理解不透或消化不好,可免费在以后培训班中重听;2、培训结束后免费提供半年的技术支持,充分保证培训后出效果;
 3、培训合格学员可享受免费推荐就业机会。 ☆合格学员免费颁发相关工程师等资格证书,提升您的职业资质。专注高端培训13年,曙海提供的证书得到本行业的广泛认可,学员的能力得到大家的认同,受到用人单位的广泛赞誉。
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                      |  应用SOC及低功耗技术的无线IC设计培训班 |  
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                                  SOC的设计方法与实现 低功耗电路的特殊设计 各种运算电路、滤波电路的设计考量 调制解调电路的算法与设计 傅利叶变换电路的设计技巧  第一部分 - Introduction 
                                  What is SoC? and why is it      important for Wireless, why not use a DSP? Impact and examples of applications Tools and metrics for analysis of performance, cost and power. Impact on memory subsystem Exploration of architectural space and alternatives Design choices (algorithm mappings), pipelining v/s concurrent,      test methodology Components of a wireless modem  Assignment: Analyzing requirements for a balanced design from a system      perspective 
 第二部分 - Arithmetic      Building Blocks and Fixed Point Arithmetic
 
                                  Representations and      notations Fixed point arithmetic v/s      floating point Adders:? RCA, CLA, CSA Multiplier designs: Booth      recoding and low power implications Array multipliers using      counters, impact on layout.?      Pipelined designs. Modeling of finite register      length effects Block floating point      representations and Dynamic range High performance, low power arithmetic blocksLab: verilog and synthesis of diff arithmetic blocks, +, *. Compare      area v/s speed v/s power  第三部分 - Digital Filters 
                                  Types of filters and their applications, decimation /interpolation.Spectral requirements, channel equalization and? inter symbol interferenceFIR filtersIIR filters, numerical stability issues. Implications of      pipelined performance of multipliers on IIR filters.Adaptive filters, Decision feedback equalizer Design and test tradeoffsExamples of High performance, low power? ???design      and implementationsLab: Design filters (FIR, IIR,      adaptive filters) for different constraints  第四部分 - Coding and Forward Error Correction 
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                      ?                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          Forward error correction and it’s application in wireless modems?Convolutional coding and decoding (Viterbi algorithm)?Trellis coding (if time permits)?Turbo-coding and decoding?Design tradeoffs, ACS units, memory addressing schemes,      scaling/wraparound, pipelining?Examples of high performance systolic design, low power designs      and implementations?Lab: Design a viterbi decoder for a convolutional for 3G standard,      implement a scaled down version of it. ? 
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                       第五部分 - Transforms – Fourier Transforms 
                        Applications : OFDM modulation in wireless systems (used in      802.11a and 802.11g)Discrete Fourier transformApplications
                          Decomposition and the Fast Fourier TransformVariants and mixed radix transformsMemory architectures, addressing schemes, block floating point,      pipelining Testing - Design of a FT block.
                          High performance, low latencyHigh performance, high throughputProgramableReconfigurable Lab:      Design and implement a butterfly unit, build a 16 point pipelined FFT      block. Synthesize and analyze the timing and determine pipelining.      Understand the contributions of the different components to gate count and      power consumption.
 第六部分 - System Design – Case Study
 
                        The design of a communications system 
                          XDSLWireless modem  The implications of the various tradeoff. System constraints include multichannel, high performance      design, single channel low power design, etc. Lab: Catchup   
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